Chipset Notes

Note: This is the June 17, 2006 capture of http://bentong.topcities.com/comp/misc/chipset.htm from the Wayback Machine. This was uploaded to the reloaded ISLESV.NET on June 22, 2023.

Chipset

• interacts with all hardware on the system

• determine system bus speeds

• handles all addressing functions for the CPU

Components of the Chipset

• North Bridge

• South Bridge

• Super I/O (technically not part of the chipset)

North Bridge

• System Controller Chip

• handles the high-speed components of the system

• directly connects CPU’s FSB to RAM, AGP, etc.

• determines what CPUs can be used

• decides how much RAM can be used

• maps data to memory (previously done by MMC or memory controller chip)

• dictates refresh cycles and RAS/CAS timings (MMC)

• determines kind of memory you can use

South Bridge

• peripheral bus controller (PCB)

• takes care of slow-speed communication

• takes care of ISA bus, IDE ports, USB ports, and any other device not specifically handled by the Super I/O chip

Chipset Manufacturers

• Acer Laboratories, Inc. (ALI)

• American Micro Devices (AMD)

• Eteq Components, Ltd.

• Intel Corporation

• OPTi

• PC Chips Manufacturing Limited

• Silicon Integrated Systems Corporation (SiS)

• VIA Technologies

Bankrupt Chipset Manufacturers

• Chips & Technologies (C&S)

• LSI Logic

• SMC

• UNI

• United Microelectronics Corp. (UMC)

• VLSI

Features of a computer that are specifically determined by the chipset includes:

• advanced devices support

• amount and type of memory supported

• bus speed, number of buses, and expansion buses supported

• number of processors, processor speed, CPU voltage

• power management

Types of Memory Modules

• DRAM SIMM

  • 30/72 contacts

  • obsolete

• DIMM

  • 72/168 contacts

  • very high-density, fast-memory chip

• Fast Page Mode DRAM

  • faster than standard DRAM

  • principle: once an address has been accessed, it will access the next one, assuming that it will be used next

• Extended Data Out (EDO)

• Burst EDO

• Synchronous DRAM (SDRAM)

• RIMMs

• PC-133

• DDR SDRAM (Double Data Rate Synchronous Dynamic RAM)

Notes on the Pentium III

• Pentium III was launched on January 1999

• differences between PII and PIII: PIII has the 70 Katmai New Instruction (KNI, now called Streaming SIMD Extension. SIMD = Single Instruction Multiple Data)

• PIII is not a new architecture; it is an improvement over the PII.

• Katmai is a volcanic mountain in the Alaskan Aleutian range.

• There is a PII 450 MHz, there is also a PIII 450 MHz.

• PIII has serial numbers.